Jessica Claire
Montgomery Street, San Francisco, CA 94105 (555) 432-1000,
Personal Goal

An active involvement in Electrical and Computer Engineering and a continuous pursuit of rewarding work that could help me in utilizing my problem-solving, administrative and effective communication skills.

05/2013 to Kernel Developer Helmerich & Payne | Odessa, TX,

Have been a part of the Linux Kernel Development team working on subsystem restart and peripheral firmware loading across all MSM chipsets. This module is responsible for loading peripheral images into memory and interfacing with the Peripheral Authentication Service (PAS) to authenticate and bring the peripherals out of reset or bring them down. It is also responsible for listening to interrupts from the peripherals about something going wrong in order to restart the entire subsystem. The work involves low level kernel programming, device driver knowledge and debugging skills.

08/2012 to 11/2012 Engineering Intern Bae Systems | Vicksburg, MS,

Worked in the Linux Kernel Development team (Qualcomm Innovation Center) on memory steering issues for the MSM-8960 chipset. The work involved developing a new framework for the ARM Linux kernel, which could potentially help in increasing the functionality of the different memory types by being able to bring up and then steer memory between two/more nodes.

06/2012 to 07/2012 Technical Intern Penn State University | University Park, PA,

Worked in the Information Technology Department on analyzing, building and running test cases for the proper back-end functionality of the IIMS interface which uses the distributed CDPL library. The work involved shell scripting and required a clear understanding of the client-server functionality.

04/2012 to 05/2012 Summer Research Assistant Ohsu | Monmouth, OR,

Worked on supporting the OpenSHMEM standard on the Tilera TILE-GX while leveraging it's native architecture for performance; investigating the feasibility of various new features for TSHMEM, exploring designs for inter-socket communications on the TILEncore-Gx and performing mini-app, kernel and micro-benchmarking experiments.

04/2010 to 05/2010 Intern Ametek, Inc. | Edgewood, NY,

Worked on designing and testing Seeker systems in MATLAB and VHDL. The work involved learning about the current functionality of the seeker systems and then, while continuously testing the changes being made to the software loaded, improve the efficiency of the system.

05/2009 to 06/2009 Trainee RIN Ltd. | City, STATE,

Worked in the SCADA Labs from where the entire functioning of the industrial control systems of the plant was monitored. Also worked with different types of Communication equipment that were being used at the plant.

Expected in 2013 to to Masters | Computer Engineering University of Florida, Gainesville, FL GPA:

CGPA: 3.44

Coursework: Computer Architecture, Computer Communication, Principles of Computer System Design, Parallel Computer Architecture, Wireless Networks, Mobile Platforms & Development Environments

Expected in 2011 to to Bachelors | Electronics and Communication Engineering Vellore Institute of Technology, Vellore, GPA:

CGPA: 3.6

Coursework: C Programming, Data Structures, Digital Signal Processing,

Semiconductor Devices, Control Systems, Microcontrollers & Microprocessors, Logic and Digital Circuits, Integrated Circuits, VLSI, Embedded System Design, Neural Networks

  • Implementation of Parallel Motion Estimation Model for Video Sequence Compression (February 2012 - April 2012): Using MPI, GSHMEM and UPC, a parallel method for Video Sequence Compression using block based motion vector estimation was designed and implemented on the IOTA cluster (containing 16 computing nodes). The parallel performances (in terms of speedup) of each of these schemes were then compared to that of the serial implementation.
  • Simulation and Performance Evaluation of AODV, DSDV and OSLR in TCP and UDP Environment (February 2012 - April 2012): Using NS-3, 3 Mobile Ad-Hoc routing protocols - AODV, DSDV and OSLR were simulated and their performances (in terms of throughput, delays, routing loads and packet delivery fraction) in TCP and UDP domains were derived and compared.
  • Capacity Calculation of the Uplink Channel of Mobile WiMax with Shadow Fading (February 2012 - April 2012): Using MATLAB, the capacity of the uplink channel of the mobile WiMax and the Gaussian Multiple Access Channels were calculated and analyzed by taking some realistic parameters into consideration and by using the Shannon's equation.
  • Analysis of Loop cache, Trace Cache, Victim Cache and Filter Cache (September 2011 - November 2011): Using SimpleScalar, designed the various cache schemes and analyzed their individual performances (in terms of cache miss rates) by using the SPEC2000 benchmark. On analysis, techniques for improving the individual cache performances were noted.
  • Redundancy and Fault Tolerance Techniques in File Systems (August 2011 - November 2011): Using PYTHON, designed a Client-Server mechanism wherein the file system implementation was connected to multiple servers out of which a few were unreliable due to failures like Server timeout, Corrupted response and Compromised key. These failures were detected and combated to an extent by using fault tolerant methods like replication, CRC and retries.
  • Design and Performance Analysis of QAPM Modulation (September 2011 - November 2011): Using MATLAB, designed, developed and analyzed a proposed QAPM model based on the QAM model. This QAPM model was then compared with the PSSK technique and their performances (Throughput and BER) were analyzed to note that the QAPM model performed better. These techniques could be used in WBAN (Wireless Body area Networks).
  • MIPS Simulator (February 2012 - February 2012): Developed a MIPS simulator using JAVA which takes in object code and produces the disassembled assembly language instructions, the state (values in) of registers and memory with the control flow of the instructions i.e. every cycle execution provided in detail.
  • ICI Reduction and Improvement of BER in OFDM systems using the Developed Improved Sinc Pulse and Maximal Ratio Combining Diversity (December 2010 - April 2011): Using MATLAB, proposed a new pulse shaping technique that improved the SIR, the ICI and the BER performances of the OFDM system. The equation for the BER was first derived for the channel using the MRC diversity technique. The performance of the modified pulse shape was then compared with that of the existing pulse shaping technique.
  • Implementation of UART using VHDL for true color LED display system (May 2010 -June 2010): Using VHSIC HDL, developed a Universal Asynchronous Receiver/ Transmitter and applied it in a true color LED display system.

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Resume Overview

School Attended

  • University of Florida
  • Vellore Institute of Technology

Job Titles Held:

  • Kernel Developer
  • Engineering Intern
  • Technical Intern
  • Summer Research Assistant
  • Intern
  • Trainee


  • Masters
  • Bachelors

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