Hardware design engineer with 2 years of experience. I am well versed in various engineering disciplines especially in VLSI/ASIC domain. These skill sets can be easily propagated to FPGA world. I have two years of research experience. Plus my approach to complex problems is analytical and logical in nature due to my schooling and experience; which makes me an ideal candidate for HFT domain. I thrive in pressurized and fast paced work environment. I always made it a point to improve my knowledge through continued education even after graduating with my Master's in Computer Engineering from University of Cincinnati. I want to keep improving and become a better engineer overall; good in both software and hardware domain. Currently my strong suit is hardware engineering.
Arbitration, DFT, Digital Design, Hardware design, Verilog, VLSI, Primetime, Research, Validation, Logic & Analytical approach to problems
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