To obtain a challenging job in electronic design and development.
[Job title] with [Number] years experience. Areas of expertise include [skills] .
Skills
- Strong background in mathematics, probability, analysis and reasoning.
- Solid in SW, HW debug and sharp problem solver skills that help to resolve countless elusive/critical bugs.
Team leadership
Self-motivated
Education
University of Southern California, Expected in May 1985 ā āBachelor of Science:Electrical Engineering - GPA:Electrical Engineering
, Expected in May 1987 ā āMaster of Science:Computer Engineering - GPA:Computer Engineering
Work History
Northrop Grumman - Principal Engineer/Manager Chandler, AZ, 08/2000 - Present
Member of Baseband verification and integration (VI) department: 10 years; SW System Debug: 8 years.
VI lead of many generations of modem and SnapDragon chipsets.
VI lead responsibilities included leading a team of 15 VI engineers to prepare and review test plans; performing pre-Si verification on emulation platform; conducting bring-up and supporting post-Si activities; supporting projects integration, resolving numerous issues by working with various teams such as SW, PMIC, RF, ATE, Failure Analysis, Apps, CQE and RMA support.
Developed methodology to optimize Rock Bottom Sleep Current for mobile chipset, saving few months of SW development/optimization cycle.
Main contributor of chipset problem solving/debug for critical production issues and RMA's.
Led and resolved numerous elusive HW/SW bugs during in-house testing and for top-tier customers.
Design a portable gamma online-thickness gauge using Motorola microprocessor MC68233 and Seiko LCD featuring battery charging, battery monitoring, watch-dog, IRDA RS232, wireless head-phone, digital automatic gain control (AGC), wireless RS-232 communication to PC.
Design, development, support all electrical and electronics aspects of the company involving two-phase, five-phase motors, motor drivers; gamma, beta, laser, ultrasonic, eddy current thickness/moisture sensors; PLCs; opto-isolators; AC/DC, DC/DC power supplies; proximity switches and relays; EMI/EMC reduction, CE certifications.
Develop and support online-thickness sensor with analog automatic gain control (AGC).
Design and develop 300-inch under-wire scanner scanners for paper industry using PLC with position feedback, probe positioning with force feedback.
Design an industrial die-bolt heaters monitor circuit as an add-on feature to the existing APC (Automatic Profile Cabinet) product.
Designed embedded circuit for the Millenium Camera control features and display using microprocessor 8051, 80KD196, Xilinx FPGA, Simen 80C166, Analog DSP2181.
Used Xilinx Field Programmable Gate Array (FPGA) to design a high precision phase-lock-loop control for three-phase, brushless, sensorless motor of motion picture camera.
This includes digital phase error detection, quadrature optical encoder, PWM amplifiers, digital PID (Proportional, Integral, Differential) loop control.
Upgraded brush motor in old camera to brushless Implement FZTSAC (Focus, Zoom, T-stop, Shutter Aperture Control) using Analog DSP2181 to coordinate camera features during movie special effect.
Designed digital crystal frequency synthesizer with accuracy better than 1PPM.
Developed RS232 protocol to Clairesfer data, commands and statues between remote computer and camera through wireless 900MHz Frequency Hopper or serial cable.
Implemented Flash EPROM in new camera design so that new features in software can be download to camera remotely.
Used Borland Delphi to develop Graphic User Interface to control a camera through lap-top computer.
JET PROPULSION LABORATORY - Member of Technical Staff City, STATE, 05/1984 - 09/1994
Member of Technical Staff, Failure Analysis group: responsible for detail failure analysis of flight SSI, MSI, LSI devices including 54LS parts, RAMs, ROMs, Priority Interrupt Decoder AMD2914, Microprocessor CD1802, 80C86 of Galileo, Magellan, Mars Observer flight projects.
Jobs include software and hardware development, knowledge of LSI and VLSI fabrication and implementation processes.
Manage the Destructive Part Analysis (DPA) process for flight devices.
Familiar with Mil-Std-883D.
Member of TCC244 Memory Read-Disturb Tiger Team, responsible in development of IC pico-probing technique and capturing the Read-Disturb phenomenon.
Develop a technique and test setup to understand the latch-up characteristic and circuit modifications to prevent latch-up for CD4000 family, TCC244 RAM.
Leader of Galileo Tiger Team in solving Latch-up in TCC244, electromigration, TI 54LS73 toggle mode problem.
Build a universal ATE including GPIB interface Keithley power supply, HP switch matrix, and HP digital multimeters.
Develop an image system to store, manipulate and retrieve different layer of IC's layout.
Achievements: Third Place Team Mathematics contest for all California High School Math Contest 1981. Undergraduate GPA 4.0/4.0 Engineering Undergraduate Honors Program. Recognition for outstanding contributions for Galileo, Magellan, Mars Observer, SIR-C and Cassini projects at Jet Propulsion Laboratory. Numerous Qualcomm Upendra Patel Achievement Awards and Power Summit Awards. Hobbies: Soccer, Swimming, Hiking, Tae Kwondo.
Accomplishments
Creative Problem Solving:
Resolved product issue through consumer testing.
Project Management
Worked directly with [departments, clients, management] to [decisive action] .
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