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principal hardware engineer resume example with 20+ years of experience

Jessica Claire
  • Montgomery Street, San Francisco, CA 94105 609 Johnson Ave., 49204, Tulsa, OK
  • Home: (555) 432-1000
  • Cell:
  • resumesample@example.com
Summary
SYSTEM/BOARD DESIGN EXPERIENCE IN THE FOLLOWING AREAS System and board design of communications/networking systems System level integration Networking interface - Ethernet, Fibre Channel, and Infini-band DDR3 & DDR2 Memory interfaces High Speed Interface - PCI, PCIe Gen1, Gen2, & Gen3, XAUI, R-XAUI, DR-XAUI, SeriaLITE, and 10G XFI, and SPI-4 CPLD - Xilinx CoolRunnerII FPGA - Xilinx Virtex IV, V, & VII, Altera Stratix IV Network Processors - EzChip NP-2, NP-4 Serial interface - I2C, SPI, and RS-232 POL, Power distribution, power monitoring, and power sequencing Design for EMI and safety compliance Knowledge of electronic system manufacturing processes TECHNICAL SKILLS Ability to conceptualize, design and develop analog and digital circuits and to make technical decisions based on technical and business inputs Ability to draw on previous or other experience to resolve design and development challenges Ability to write detail technical reports, business correspondence and procedures Experience in design for cost, test, and manufacturing Design tool experience in OrCAD, Concept, Allegro PCB Design, and HyperLynx Work experience with inter-disciplinary team and outside partners Ability to bring the latest technology into products Agile experience in managing document control, BOM, ECO & MCO
Accomplishments
Leading member of the new product development team that designed several top-selling electromechanical medical devices for heart patients.
Highlights
  • Strong decision maker
  • Analog and digital hardware and firmware design
  • VHDL and Verilog language training
  • Data collection
Experience
Principal Hardware Engineer, 01/2012 to Current
Casa SystemsAtlanta, GA,
  • Architected two I/O Modules - 10G Ethernet and 16G Fibre Channel, which operate in the next generation IB-EDR (100Gbps) chassis
  • Designed a dual port 16G Fiber Channel I/O Module, meeting design specifications and schedule, and released to production 
  • Participated in the design and verification of the backplane interface
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  • Worked as liaison between Engineering and Operations to resolve RoHS, second source, and PCN issues
  • Supported and sustained the legacy Xsigo Virtual I/O systems.
Senior Hardware Engineer, 01/2005 to 07/2012
Microsoft CorporationBoydton, VA,
  • Architected and designed the I/O modules - 10G Ethernet and 8G Fiber Channel, crucial for the Xsigo I/O Director Achieved power and cost savings utilizing state-of-the-art chip technology Developed innovative packaging to address thermal issues in a compact design Managed and coordinated hardware design to ensure software compatibility Overcame technical challenges by analyzing quantitative data collected from various tests All completed designs were released from prototype to production with no board re-spin Ensured projects were completed on time to align with company product release schedule.
Technical Staff Engineer, 01/2001 to 01/2005
Microsoft CorporationIselin, NJ,
  • Designed a controller board with dual DSP board running at 1GHz and Virtex II Pro FPGA for real time data processing of wave front correction Designed a high power laser transmitter +10 dBm and high sensitivity optical receiver of -46 dBm Designed a Tip-Tilt control board of analog and digital control Designed a Variable Optical Attenuator (VOA) module Designed a transponder with high transmit power laser and high sensitivity receiver operating at OC-48, OC-12, OC-3, and GE rates Managed and designed the Interface Unit to work with the Adaptive Optics system.
Senior Hardware Engineer, 01/1999 to
Mantech International CorporationNorth Charleston, SC,
  • Designed a DWDM SONET OC-48 interface card used in a Metro DWDM transport system.
  • Designed monitoring circuit for critical parameters of optical transmitter and receiver.
  • Designed a data processor using FPGA to interface between back plane and framer.
  • Worked on the timing and synchronization scheme for the SONET node chassis.
Hardware Engineer, 01/1997 to
Transcend Access Systems, IncCity, STATE,
  • Defined and designed overall system architecture of a digital loop carrier system.
  • Responsible for the HW design of exchange and subscriber interface line cards, power supply, and remote battery charging system.
  • Managed the design of the following modules: T1/E1, ISDN BRI, and MLT test.
  • Designed an OC-3 Transport module using duplex optical transceiver and WDM transceiver.
Education
Master of Science: Computer Science, Expected in
Santa Clara University - Santa Clara, CA
GPA:
Computer Science
Bachelor of Science: Electrical Engineering, Expected in
San Jose State University - San Jose, CA
GPA:
Electrical Engineering
: , Expected in
U.S. PATENT - ,
GPA:
Patent 7286766 Free Space Optical Communication System with Power Level Management Invented an adaptive optical power regulator for a free space optical communication system to perform wavefront correction due to scintillation and atmospheric losses.
Skills
art, controller, data processing, dBm, DSP, DWDM, Ethernet, Ethernet I, hardware design, ISDN, laser, Director, exchange, packaging, power supply, real time, scheme, SONET, system architecture, T1

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Resume Overview

School Attended

  • Santa Clara University
  • San Jose State University
  • U.S. PATENT

Job Titles Held:

  • Principal Hardware Engineer
  • Senior Hardware Engineer
  • Technical Staff Engineer
  • Senior Hardware Engineer
  • Hardware Engineer

Degrees

  • Master of Science
  • Bachelor of Science

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