To secure a full-time Thin films Process Engineer Engineering position.
Tools TIMS, Spotfire DXP, JMP, PW
Fab Engineer05/2010 to Current
Lot and equipment dispositions.
Identifying and solving systematic problems in either process or equipment.
Fab Engineering Technician05/2005 to 04/2010TEXAS INSTRUMENTS INCDallas, TX
Troubleshoot and repair semiconductor Process equipments.
Working with Engineers to improve and support next generation product and process through upgrades and modifications of wet etch tools.
Working with Process engineering to resolve maintenance issues, improve equipment reliability and minimize equipment downtime Performing preventive maintenance and high-level troubleshooting of electronic, pneumatic, and mechanical problems.
Dipostioning hold lots.
Co-leader and coordinator
for statistical process control for the FAB Core team member on tech transfer from HFAB and HIJI to DFAB.
Core team member and module rep for GFAB tech transfer to DFAB.
Performing engineering change control, and process release strategies, equipment and process startup that includes AMAT RTP, PVD and Novellus Concept 1 PECVD tools.
Establish operating thin film PVD and CVD equipment specifications Improve manufacturing techniques, and facilitate new process equipment production.
Responsible for process control improvement and predictability through SPC monitoring.
RTP tool modification from 150mm to 200mm and qualification to support new tech transfer.
Install and qualified new PVD Endura tool for all GaN metal processes.
Participated in a team that determined root cause and solution of GaN current collapse on PSiN and ILN leading to 60% parametric and reliability improvement.
Formed and lead a team that resolved LBC4HVCAP-150mm metal 1 and metal 2 opens caused by process marginality and poor planarization.
Started and led team that worked Metal delamination baseline problem.
Team identified and eliminated root cause leading to no A/T lot rejections and decreased sMPY loss.
Designed, developed and implanted automation on UV Tencor, SurfScan, and prometrix that supports automated process control on DFAB cluster tools.
Designed, developed, implemented new automation, TIMS and PW on: PECVD Novellus Concept 1 that resolved GaN manufacturability issues of nitride films.
PECVD Novellus Concept 1 that simplified qualifications from 8 hours to 1.5 hours improving Ao by 12%.
SACVD BPSG process that eliminated manual input settings and improved Ao by 20%.
PVD metal dep tools that eliminated PC qualifications and increased tool Ao and throughput by 5% and PPH by 20%.
Designed, developed and implemented: Low dopant PSG (2.5%) process on DFAB SACVD tools equivalent to that used on GFAB techs on C1 to eliminate single path on C1 for GFAB technologies and need for addition $950k for Novellus C1 tool.
Low dopant BPSG process (3.2%B, 3.4%P) on DFAB NO008 to match GFAB process for P2-AMPS to resolve issue with 10% yield due high contact resistance to 96% yield.
Low dopant BPSG process (3.2%B, 3.4%P) on DFAB SACVD tools (BD100, BD200) equivalent to that used on GFAB techs on NO008 to help move P2-AMPS process from NO008 to SACVD for process harmonization & eliminate NO008 single path.
TEOS process for VIP3 that addressed capacitance parametric issues that resulted into a yield of 95% up from 0%.
Designed, developed, tested, and qualified new process RTP process for GFAB Front end of the line RTP process that resulted to Signal to Noise Ratio performance.
RTP TiSi2 process improvement for 50CXXX technology that reduced P+ sheet resistance to target and eliminated Ti metal shorts resulting in increased sMPY from 0 to 97%.
Process improvement at final anneal by use H2 processing to eliminate Al oxidation that resulted in passing final test contact resistance and final yield of 100% up from 0% yield.
Multi-step temperature ramping process for GaNTiAlCu anneal alloy for fragile GaN wafers resulting in consistent electrical performance and zero PY loss.
Low stress process for a thick Al process that is free of Al whiskers resulting to elimination of metal shorts, improved sMPY and reliability.
Low power, slow temperature ramp degas process that resulted to zero PY loss.
Low power sputter plasma clean process that reduced metal gate leakage by a factor of 1000.
Stable process for GaN metal transistor with less than 100nM AlCu layer.
Responsible for increasing tool stability, improving throughput, quality and optimizing cost.
Qualified Platinum thickness reduction on all 200mm DFAB technologies that resulted to 10% cost reduction Pt targets.
Cost and Ao improvement on TiW chambers.
Improved Ao by 5% on TiW by using Dual coated Twin wire arc spray that eliminated premature particle failures caused by delamination of Single coated Twin wire arc sprayed kits.
Increased Ao by 4% on bottleneck 150mm Endura by eliminating unnecessary DC fault on aluminum chambers by improved process control using process height adjustment to compensate for height loss due to target life.
Resolved Nichrome qualification qual issues by eliminating grain size variation due to bad and wide variation on test wafers that resulted to improved Cpk > 1.67 and increased Ao 5% A0 increase.
PY and sMPY improvement by eliminating first wafer effect and improving particle performance by optimized new chamber clean process for removing WSix flakes after long chamber idles resulted to 20% Ao improvement and 10% sMPY.
Extended platinum target life and scheduled qualifications that improved Ao by 10% and reduced Pt cost by 7%.
Trained and Mentored and two new college graduates on Thin films processes.
Education and Training
B.S: Electrical Engineering - MicroelectronicsDecember 2004The University of Texas at DallasRichardson, TexasElectrical Engineering - Microelectronics
M.S: Electrical Engineering - MicroelectronicsDecember 2010The University of Texas at DallasRichardson, TexasElectrical Engineering - Microelectronics
Concept 1, process control, Process engineering, process equipment, Process improvement