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Jessica Claire
  • Montgomery Street, San Francisco, CA 94105
  • H: (555) 432-1000
  • C:
  • resumesample@example.com
  • Date of Birth:
  • India:
  • :
  • single:
Summary
  • 11  years of post-silicon validation experience at Texas Instruments, Fairchild & Cirrus Logic as contractor through Soliton/Anora
  • Currently managing a 15 member bench validation/ATE team
  • National Instruments Certified LabVIEW Architect
  • Proficient in LabVIEW, TestStand, Python & C
  • Designed and developed multiple bench validation solutions for mixed signal device characterization - validation planning, instrument selection, hardware interface design, validation software development & device validation
  • Designed and developed NI STS based ATE test solutions
  • Automated all types of instruments from basic power supplies to spectrum analyzers
  • Familiar with DC, AC & timing measurements along with time domain and frequency domain analysis
  • Developed memory validation system using NI HSDIO 
  • Developed protocol validation system using NI HSDIO & NI FPGA - I2C, SPI, JTAG, etc
  • Validated Power management devices - load switches, LED drivers, H bridge motor drivers, battery chargers & mid-voltage buck-boost regulators 
  • Validated single channels ADCs to multi-channel audio codecs
  • Validated several mixed-signal devices from TI
  • Developed 100 EVM GUIs using LabVIEW and co-Architected a C# based GUI
  • Trained 80 Texas Instruments validation engineers  at 7 design centers on latest validation tools and techniques 

Skills

Programming

  • LabVIEW
  • TestStand
  • Python
  • C
  • Matlab/Scilab
  •   
Data Analysis
  • EXCEL
  • DIAdem
  • Spotfire​​
 

Soft Skills

  • Good writing & analytical skills
  • Self driven
  • Quick learner
  • Team player
Experience
Manager - Silicon Validation, 2015 - Current
Relx Group Tampa, FL,
  • Helped Anora start Silicon validation business unit and made it profitable right from the first year
  • Built a 15 member bench validation team recruiting internally and externally
  • Got trained from National Instruments on their latest PXI based semiconductor tester (NI STS)
  • Designed & developed NI STS based ATE test solutions
  • Led the team to develop NI PXI based bench validation solutions from scratch - PXI instrument selection, reusable hardware interface and scalable automation infrastructure with built-in data logging, waveform plotting and scope captures
  • Led 10+  mixed signal device validation projects from test planning till SCM characterization - RF MEMS, battery chargers, linear regulators, buck-boost regulators, H-bridge drivers & audio codecs
Project manager, 05/2011 - 11/2014
Soliton Technologies Inc City, STATE,
  • Designed & developed 100 EVM GUIs
  • Designed & developed several bench validation solutions for ADCs, DC-DC converter for RF power amplifiers, reclockers, timers & equalizers
  • Designed NI HSDIO based JTAG analyzer
  • Managed projects from scoping, resource allocation, system design, execution, validation till delivery
  • Trained validation team with little or no automation to use centralized validation infrastructure and upgraded their validation process
  • Traveled to several Texas Instruments design centers to train validation engineers on using latest bench validation tools

         USA - Dallas, Santa Clara, Grass Valley, Denver, Federal way

         Finland - Oulu

         India - Bangalore
Project Engineer|Senior Project Engineer|Project Lead, 05/2006 - 04/2011
Soliton Technologies City, STATE,
  • Trained on National Instruments LabVIEW & TestStand
  • Developed instrument drivers and reusable test modules as part of Texas Instruments central validation infrastructure team
  • Managed a team of 8 engineers
  • Developed processes for silicon validation software development
  • Joined Texas Instruments post-silicon validation team as contractor through Soliton
  • Used and automated all type of instruments ranging from power supplies to spectrum analyzer connected through GPIB, Ethernet & USB
  • Validated several mixed signal & RF devices
  • Developed test routines for 1dB Compression point, IP2, IP3, IMD3, INL/DNL, efficiency, line/load regulation, line/load transients, RDSon, etc
  • Developed GSM/EDGE & WCDMA test solution using RSCMU200 Universal radio communication tester
Education and Training
B.E: Electronics and Communication Engineering, Expected in 2006
-
PSNA College of Engineering and Technology - Dindigul, Tamilnadu
GPA:
  • Got 77% aggregate
  • Electronics and communication department representative
  • Led annual department symposium
  • Got recruited right out of college
  • Designed a protocol translator using Xilinx MicroBlaze
Certifications
  • National Instruments Certified LabVIEW Architect
  • Diploma in Computer Hardware Engineering
Awards
  • Best outgoing student in college 2006 
  • Best team player in Soliton 2008
  • Best team player in Soliton 2010
  • Best team player in Soliton 2011

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School Attended

  • PSNA College of Engineering and Technology

Job Titles Held:

  • Manager - Silicon Validation
  • Project manager
  • Project Engineer|Senior Project Engineer|Project Lead

Degrees

  • B.E

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