SEARCH

Head Teaching Assistant Resume Example

Resume Score: 90%

Love this resume?Build Your Own Now
HEAD TEACHING ASSISTANT
Areas of Expertise
C/C++, VHDL, Embd C, Verilog, Python Designing Tool: Cadence, LVS, DRC, Hspice, LabVIEW, MATLAB, Xilinx ISE, Vivado, ModelSim, ARM Data structures, OS, MS Office

ASIC, FPGA, VLSI floor-planning, STA, Clock tree synthesis(CTS), Clock Domain Crossing(CDC) Power analysis, Physical & RTL design, Cache design, Advance pipelining, Multicore processors, CPU/micro-architecture, SoC, SRAM, Layout, CMOS, Logic design
Professional Experience
Jun 2016 to Aug 2016
  • Mentor- Summer Research Students (Digital Logic Design.
Head Teaching AssistantJan 2016 to Current
Company Name
  • To help students play a game developed using Xilinx ISE and Nexys 4 DDR FPGA board.
  • Managing the semester long design project of students & help them in Digital logic and State machine concepts 'Project Fellow'- National Physical Lab.
Nov 2014 to Aug 2015
  • Did Virtual Instrumentation & Automation using LabVIEW.
  • Measurements of transport properties (R-T & I-V) of superconducting thin films at low-temperature up to 4K 'Graduate Engineer Trainee' - Nokia Solutions & Networks (NSN).
Dec 2013 to Sep 2014
  • Solved WCDMA/HSPA/LTE queries for leading telecom operators.
  • Customized solution building & Tool based network dimensioning.
Education
MS, Computer EnggMay 2017New York University, Tandon School of Engineering － City, StateComputer Engg 3.54/4
Graduate
VLSI Design, Analog IC Design, Nanoelectronics devices, Real-time embedded systems, Advanced Computer HW Design, Computer Arch-1&2, Data Structures & Algo
Bachelor of Technology, Electronics & CommunicationJune 2013Guru Gobind Singh Indraprastha University － City, IndiaElectronics & Communication 76.34 1st Class with distinction
Analog Electronics, OOPs using C++, Digital Circuits, Computer Architecture, Microprocessors, VLSI Design
Accomplishments
  • https://www.linkedin.com/varun GitHub: https://github.com/91varunsharma PROJECTS PROJECTS 'MIPS processor implemented on FPGA' (Nov.
  • 2016-Dec.
  • 2016).
  • 32-bit MIPS processor was written in VHDL and run it on FPGA.
  • Implemented complete RC5 encryption & decryption using the MIPS instructions on the processor designed using VHDL 'Design of Multilevel Cache memory simulator ' Nov.
  • 2016.
  • Designed a multilevel cache memory system simulator in C++ using round robin replacement policy on cache accesses '32-bit MIPS Simulator using C++' Oct.
  • 2016.
  • Designed an instruction-level simulator for a single cycle MIPS processor in C++ which model the execution of instructions.
  • Design & Enhancement of On-Chip Optical Interconnect Performance'- Term Paper (Feb.
  • 2016-May.
  • 2016).
  • Modelled the VCSEL (Vertical Cavity Surface Emitting Laser) based optical modulator using MATLAB Simulink.
  • Performance comparison of electrical and optical interconnects indicated that latter is better for data transmission in high speed integrated circuits.
  • Two Stage OTA on 180nm technology' (Apr.2016-May.2016).
  • Phase Margin- 72.8 Degrees, Closed Loop Gain~2, Open Loop Gain-59.1dB, Slew Rate-34.13 V/uS, GBW(0dB)-43.26 MHz, GBW(-3dB)-30.6 MHz were achieved 'Accelerometer Based Gaming Console' (Feb.2016-May.
  • 2016).
  • Developed a standalone gaming device for a multiplayer Artillery Game.
  • Users provide inputs to their players from the on board accelerometer of STM32F4Discovery microcontroller and the game is played on an LCD interfaced with the board.
  • Memory System Design 256-bit (6T-SRAM) & Layout using 45nm technology' (Sep.
  • 2015-Dec.
  • 2015).
  • Lead a team of 4 and achieved weekly goals.
  • Read & Write margins were 30% and 50%, 6-T SRAM cell layout area <>
  • m2, clocking frequency of 1.5 GHz and power supply as low as 780mV were achieved 'Coaxial Rotor Aerial Vehicle (CRAV)' (Jan.
  • 2013-May.
  • 2013).
  • A coaxial rotor remote controlled copter capable of carrying a payload up to 400 grams along with a camera was designed using ATMEL 328 PA IC using MATLAB & C coding Anvinder Singh & Varun Sharma (2013) Design analysis and construction of energy harvesting coaxial helicopter, Aviation, 17:4, 145-149- Taylor & Francis.
  • Anvinder Singh & Varun Sharma (2015) Techno-logical aspects of Time travel, IJAREAS, 4:2, 88-98-GARPH.
Skills
Algo, ASIC, Automation, C, C++, Cadence, Hardware, CPU, Designing, Electronics, embedded systems, Engineer, LabVIEW, Layout, Logic, Managing, MATLAB, Mentor, Microprocessors, MS Office, network, Networks, OOPs, OS, processors, Programming, Python, Real-time, Research, telecom, Verilog, VHDL, VLSI
Build Your Own Now

DISCLAIMER

Resumes, and other information uploaded or provided by the user, are considered User Content governed by our Terms & Conditions. As such, it is not owned by us, and it is the user who retains ownership over such content.

Resume Overview

School Attended

  • New York University, Tandon School of Engineering
  • Guru Gobind Singh Indraprastha University

Job Titles Held:

  • Head Teaching Assistant

Degrees

  • MS , Computer Engg May 2017
    Graduate
    VLSI Design, Analog IC Design, Nanoelectronics devices, Real-time embedded systems, Advanced Computer HW Design, Computer Arch-1&2, Data Structures & Algo
    Bachelor of Technology , Electronics & Communication June 2013
    Analog Electronics, OOPs using C++, Digital Circuits, Computer Architecture, Microprocessors, VLSI Design

Similar Resumes

View All
Teaching-Assistant-resume-sample

Teaching Assistant

Beattyville, Kentucky